Simplified Motion Control of a Vehicle manipulator for the Coordinated Mobile Manipulation

This paper considers a resolved kinematic motion control approach for controlling a spatial serial manipulator arm that is mounted on a vehicle base. The end-effector’s motion of the manipulator is controlled by a novel kinematic control scheme, and the performance is compared with the well-known operational-space control scheme. The proposed control scheme aims to track the given operational-space (end-effector) motion trajectory with the help of resolved configuration-space motion without using the Jacobian matrix inverse or pseudo inverse. The experimental testing results show that the suggested control scheme is as close to the conventional operational-space kinematic control scheme

Performance Investigations of an Improved Backstepping Operational space Position Tracking Control of a Mobile Manipulator

This article implies an improved backstepping control technique for the operational-space position tracking of a kinematically redundant mobile manipulator. The mobile manipulator thought-out for the analysis has a vehicle base with four mecanum wheels and a serial manipulator arm with three rotary actuated joints. The recommended motion controller provides a safeguard against the system dynamic variations owing to the parameter uncertainties, unmodelled system dynamics and unknown exterior disturbances. The Lyapunov’s direct method assists in designing and authenticating the system’s closed-loop stability and tracking ability of the suggested control strategy. The feasibility, effectiveness and robustness of the recommended controller are demonstrated and investigated numerically with the help of computer based simulations. The mathematical model used for the computer-based simulations is derived based on a real-time mobile manipulator and the derived model is further verified with an inbuilt gazebo model in a robot operating system (ROS) environment. In addition, the proposed scheme is verified on an in-house fabricated mobile manipulator system. Further, the recommended controller performance is correlated with the conventional backstepping control design in both computer-based simulations and in real-time experiments

Classification of Targets Using Statistical Features from Range FFT of mmWave FMCW Radars

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Improvement of memory performance of 3-D NAND flash memory with retrograde channel doping

The examination of the effect of retrograde channel doping on reliability and performance of 3-D junction-free NAND based flash memory is done for this paper. Specifically, we study the program characteristics, data retention capability junction-free NAND flash memory with half pitch range from 35 nm to 12 nm. Based on our analysis, we highlight that the retrograde channel doping approach can improve not only the SCEs but also the program speed and data control time for 3-D junction-free NAND flash memory, without varying the oxide stack in charge trap-based flash memory

MPEG/H256 video encoder with 6T/8T hybrid memory architecture for high quality output at lower supply

The use of Multimedia video content is increased rapidly in the past decade, and most multimedia video content is used by mobile phone users. Multimedia video processing consumes significant power during video compression, and thus low power multimedia video compression is essential for battery operated devices. Moving Picture Experts Group (MPEG) Video encoding is giving a higher compression rate and low bandwidth requirement. Conventional MPEG Video encoding architecture uses the conventional 6T memory cells to store video frames for further compression processing. The failure probability of 6T cells is significantly large (0.0988 at 600 mV supply voltage), leading to a decrease in the output quality of the encoded video. From the hybrid memory matrix formulation, it is calculated that storing higher-order MSB bits in highly stable memory cells will provide high-quality video encoding processing as compared to the conventional technique because the human eye is more susceptible to higher-order luminance bits. Hence, in this research work instant of using conventional 6T memory cells during video encoding processing, a unique Hybrid 6T/8T memory architecture is proposed, where the 8-bit Luminance pixels are stored favourably in consonance with their effect on the output quality. The higher order luminance bits (MSB’s) require high stability and thus these bits are stored in the 8T bit cells and the remaining bits (LSB’s) are stored in the conventional 6T bit cells for high-quality video encoding processing. This research article also proposes a separate memory peripheral circuitry for hybrid memory architecture for video encoding techniques. In addition, this article proposes a unique architecture for parallel video processing with the use of a hybrid pixel memory array. The failure probability of 6T and 8T at the worst failure corner (FS corner for read and SF corner for write) is simulated for 30000 Monte-Carlo simulations points at 45 nm CMOS technology node using CADENCE EDA tool. For the simulation work here, a standard Common Intermediate Format/Quarter Common Intermediate Format (CIF/QCIF) Coastguard video sample is used and for output quality here average PSNR method is used and simulation work is performed using the MATLAB tool.The worst PSNR for conventional 6T memory array and Hybrid memory array at 600 mV supply voltage shows improvement in worst minimum PSNR as 6.43 dB is calculated. 30% less power consumption to conventional memory architecture